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  ? semiconductor components industries, llc, 2006 june, 2006 ? rev. 7 1 publication order number: mc14503b/d mc14503b hex non?inverting 3?state buffer the mc14503b is a hex non?inverting buffer with 3?state outputs, and a high current source and sink capability. the 3?state outputs make it useful in common bussing applications. two disable controls are provided. a high level on the disable a input causes the outputs of buffers 1 through 4 to go into a high impedance state and a high level on the disable b input causes the outputs of buffers 5 and 6 to go into a high impedance state. features ? 3?state outputs ? ttl compatible ? will drive one ttl load over full temperature range ? supply voltage range = 3.0 vdc to 18 vdc ? two disable controls for added versatility ? pin for pin replacement for mm80c97 and 340097 ? pb?free packages are available* maximum ratings (voltages referenced to v ss ) (note 1) parameter symbol value unit dc supply voltage range v dd ?0.5 to +18.0 v input or output voltage range (dc or transient) v in , v out ?0.5 to v dd + 0.5 v input current (dc or transient) per pin i in 10 ma output current (dc or transient) per pin i out 25 ma power dissipation, per package (note 2) p d 500 mw ambient temperature range t a ?55 to +125 c storage temperature range ?65 to +150 c lead temperature (8?second soldering) 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. maximum ratings are those values beyond which damage to the device may occur. 2. temperature derating: plastic ?p and d/dw? packages: ? 7.0 mw/  c from 65  c to 125  c this device contains protection circuitry to guard against damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high?impedance circuit. for proper operation, v in and v out should be constrained to the range v ss  (v in or v out )  v dd . unused inputs must always be tied to an appropriate logic voltage level (e.g., either v ss or v dd ). unused outputs must be left open. *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. a = assembly location wl, l = wafer lot yy, y = year ww, w = work week g = pb?free package marking diagrams pdip?16 p suffix case 648 soic?16 d suffix case 751b 1 16 14503bg awlyww soeiaj?16 f suffix case 966 1 16 mc14503b alywg see detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. ordering information 16 1 mc14503bcp awlyywwg http://onsemi.com 1 1 1
mc14503b http://onsemi.com 2 pin assignment 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 in 5 out 6 in 6 v dd out 4 in 4 out 5 in 2 out 1 in 1 dis a v ss out 3 in 3 out 2 dis b logic diagram truth table appropriate disable in n input out n 00 0 10 1 x 1 high impedance x = don?t care disable b out 5 15 12 14 2 4 6 10 1 in 5 in 6 in 1 in 2 in 3 in 4 disable a out 6 out 1 out 2 out 3 out 4 11 13 3 5 7 9 v dd = pin 16 v ss = pin 8 circuit diagram *in n *disable * input to other buffers v ss v dd out n *diode protection on all inputs (not shown) one of two/four buffers ordering information device package shipping ? mc14503bcp pdip?16 25 / rail mc14503bcpg pdip?16 (pb?free) mc14503bd soic?16 48 / rail mc14503bdg soic?16 (pb?free) mc14503bdr2 soic?16 2500 / tape & reel MC14503BDR2G soic?16 (pb?free) mc14503bfel soeiaj?16 2000 / tape & reel mc14503bfelg soeiaj?16 (pb?free) ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
mc14503b http://onsemi.com 3 ????????????????????????????????? ????????????????????????????????? (voltages referenced to v ss ) ??????????? ? ????????? ? ? ????????? ? ??????????? characteristic ??? ? ? ? ? ? ? ??? symbo l ??? ? ? ? ? ? ? ??? v dd vdc ?????? ??????  c ???????? ????????  c ?????? ??????  c ?? ?? ?? ?? ???? ? ?? ? ???? min ??? ? ? ? ??? max ??? ? ? ? ??? min ???? ? ?? ? ???? typ (note 3) ??? ? ? ? ??? max ??? ? ? ? ??? min ???? ? ?? ? ???? max ??????????? ? ????????? ? ? ????????? ? ? ????????? ? ??????????? output voltage ?0? leve l v in = 0 ?1? leve l v in = v dd ??? ? ? ? ??? v ol ??? ? ? ? ??? 5.0 10 15 ???? ? ?? ? ???? ? ? ? ??? ? ? ? ??? 0.05 0.05 0.05 ??? ? ? ? ??? ? ? ? ???? ? ?? ? ???? 0 0 0 ??? ? ? ? ??? 0.05 0.05 0.05 ??? ? ? ? ??? ? ? ? ???? ? ?? ? ???? 0.05 0.05 0.05 ?? ?? ?? ??? ? ? ? ??? v oh ??? ? ? ? ??? 5.0 10 15 ???? ? ?? ? ???? 4.95 9.95 14.95 ??? ? ? ? ??? ? ? ? ??? ? ? ? ??? 4.95 9.95 14.95 ???? ? ?? ? ???? 5.0 10 15 ??? ? ? ? ??? ? ? ? ??? ? ? ? ??? 4.95 9.95 14.95 ???? ? ?? ? ???? ? ? ? ?? ?? ?? ??????????? ? ????????? ? ? ????????? ? ? ????????? ? ? ????????? ? ? ????????? ? ??????????? input voltage ?0? leve l (v o = 3.6 or 1.4 vdc) (v o = 7.2 or 2.8 vdc) (v o = 11.5 or 3.5 vdc) ?1? leve l (v o = 1.4 or 3.6 vdc) (v o = 2.8 or 7.2 vdc) (v o = 3.5 or 11.5 vdc) ??? ? ? ? ? ? ? ??? v il ??? ? ? ? ? ? ? ??? 5.0 10 15 ???? ? ?? ? ? ?? ? ???? ? ? ? ??? ? ? ? ? ? ? ??? 1.5 3.0 4.0 ??? ? ? ? ? ? ? ??? ? ? ? ???? ? ?? ? ? ?? ? ???? 2.25 4.50 6.75 ??? ? ? ? ? ? ? ??? 1.5 3.0 4.0 ??? ? ? ? ? ? ? ??? ? ? ? ???? ? ?? ? ? ?? ? ???? 1.5 3.0 4.0 ?? ?? ?? ?? ??? ? ? ? ? ? ? ??? v ih ??? ? ? ? ? ? ? ??? 5.0 10 15 ???? ? ?? ? ? ?? ? ???? 3.5 7.0 11 ??? ? ? ? ? ? ? ??? ? ? ? ??? ? ? ? ? ? ? ??? 3.5 7.0 11 ???? ? ?? ? ? ?? ? ???? 2.75 5.50 8.25 ??? ? ? ? ? ? ? ??? ? ? ? ??? ? ? ? ? ? ? ??? 3.5 7.0 11 ???? ? ?? ? ? ?? ? ???? ? ? ? ?? ?? ?? ?? ??????????? ? ????????? ? ? ????????? ? ? ????????? ? ? ????????? ? ? ????????? ? ? ????????? ? ??????????? output drive current (v oh = 2.5 vdc) source (v oh = 2.5 vdc) (v oh = 4.6 vdc) (v oh = 9.5 vdc) (v oh = 13.5 vdc) (v ol = 0.4 vdc) sink (v ol = 0.4 vdc) (v ol = 0.5 vdc) (v ol = 1.5 vdc) ??? ? ? ? ? ? ? ? ? ? ??? i oh ??? ? ? ? ? ? ? ? ? ? ??? 4.5 5.0 5.0 10 15 ???? ? ?? ? ? ?? ? ? ?? ? ???? ? 4.3 ? 5.8 ? 1.2 ? 3.1 ? 8.2 ??? ? ? ? ? ? ? ? ? ? ??? ? ? ? ? ? ??? ? ? ? ? ? ? ? ? ? ??? ? 3.6 ? 4.8 ? 1.02 ? 2.6 ? 6.8 ???? ? ?? ? ? ?? ? ? ?? ? ???? ? 5.0 ? 6.1 ? 1.4 ? 3.7 ? 14.1 ??? ? ? ? ? ? ? ? ? ? ??? ? ? ? ? ? ??? ? ? ? ? ? ? ? ? ? ??? ? 2.5 ? 3.0 ? 0.7 ? 1.8 ? 4.8 ???? ? ?? ? ? ?? ? ? ?? ? ???? ? ? ? ? ? ?? ?? ?? ?? ?? ??? ? ? ? ? ? ? ??? i ol ??? ? ? ? ? ? ? ??? 4.5 5.0 10 15 ???? ? ?? ? ? ?? ? ???? 2.2 2.6 6.5 19.2 ??? ? ? ? ? ? ? ??? ? ? ? ? ??? ? ? ? ? ? ? ??? 1.8 2.1 5.5 16.1 ???? ? ?? ? ? ?? ? ???? 2.1 2.3 6.2 25 ??? ? ? ? ? ? ? ??? ? ? ? ? ??? ? ? ? ? ? ? ??? 1.2 1.3 3.8 11.2 ???? ? ?? ? ? ?? ? ???? ? ? ? ? ?? ?? ?? ?? ??????????? ??????????? ??? ??? ??? ??? ???? ???? ??? ??? 0.1 ??? ??? ???? ???? 0.00001 ??? ??? 0.1 ??? ??? ???? ???? 1.0 ?? ??  adc ??????????? ??????????? ??? ??? ??? ??? ???? ???? ??? ??? ??? ??? ???? ???? ??? ??? ??? ??? ???? ???? ?? ?? ??????????? ? ????????? ? ??????????? quiescent current, (per package) ??? ? ? ? ??? i q ??? ? ? ? ??? 5.0 10 15 ???? ? ?? ? ???? ? ? ? ??? ? ? ? ??? 1.0 2.0 4.0 ??? ? ? ? ??? ? ? ? ???? ? ?? ? ???? 0.002 0.004 0.006 ??? ? ? ? ??? 1.0 2.0 4.0 ??? ? ? ? ??? ? ? ? ???? ? ?? ? ???? 30 60 120 ?? ?? ??  adc ??????????? ? ????????? ? ? ????????? ? ? ????????? ? ??????????? total supply current (note 4, 5) (dynamic plus quiescent, per package) (c l = 50 pf on all outputs) (all outputs switching, 50% duty cycle) ??? ? ? ? ? ? ? ? ? ? ??? i t ??? ? ? ? ? ? ? ? ? ? ??? 5.0 10 15 ?????????????????? ? ???????????????? ? ? ???????????????? ? ? ???????????????? ? ?????????????????? i t = (2.5  a/khz) f + i dd i t = (6.0  a/khz) f + i dd i t = (10  a/khz) f + i dd ?? ?? ?? ?? ??  adc ??????????? ??????????? ??? ??? ??? ??? ???? ???? ??? ??? 0.1 ??? ??? ???? ???? 0.0001 ??? ??? 0.1 ??? ??? ???? ???? 3.0 ?? ??  adc 3. data labelled ?typ? is not to be used for design purposes but is intended as an indication of the ic?s potential performance. 4. the formulas given are for the typical characteristics only at 25  c. 5. to calculate total supply current at loads other than 50 pf: i t (c l ) = i t (50 pf) + (c l ? 50) vfk where: i t is in  a (per package), c l in pf, v = (v dd ? v ss ) in volts, f in khz is input frequency, and k = 0.006.
mc14503b http://onsemi.com 4 switching characteristics (note 6) (c l = 50 pf, t a = 25  c) ???????????????????? ? ?????????????????? ? ? ?????????????????? ? ???????????????????? characteristic ????? ? ??? ? ? ??? ? ????? symbol ??? ? ? ? ? ? ? ??? v dd v cc ?????? ?????? ??? ? ? ? ? ? ? ??? unit ???? ? ?? ? ???? typ (note 7) ??? ? ? ? ??? max ???????????????????? ? ?????????????????? ? ???????????????????? output rise time t tlh = (0.5 ns/pf) c l + 20 ns t tlh = (0.3 ns/pf) c l + 8.0 ns t tlh = (0.2 ns/pf) c l + 8.0 ns ????? ? ??? ? ????? t tlh ??? ? ? ? ??? 5.0 10 15 ???? ? ?? ? ???? 45 23 18 ??? ? ? ? ??? 90 45 35 ??? ? ? ? ??? ns ???????????????????? ? ?????????????????? ? ? ?????????????????? ? ???????????????????? output fall time t thl = (0.5 ns/pf) c l + 20 ns t thl = (0.3 ns/pf) c l + 8.0 ns t thl = (0.2 ns/pf) c l + 8.0 ns ????? ? ??? ? ? ??? ? ????? t thl ??? ? ? ? ? ? ? ??? 5.0 10 15 ???? ? ?? ? ? ?? ? ???? 45 23 18 ??? ? ? ? ? ? ? ??? 90 45 35 ??? ? ? ? ? ? ? ??? ns ???????????????????? ? ?????????????????? ? ? ?????????????????? ? ???????????????????? turn?off delay time, all outputs t plh = (0.3 ns/pf) c l + 60 ns t plh = (0.15 ns/pf) c l + 27 ns t plh = (0.1 ns/pf) c l + 20 ns ????? ? ??? ? ? ??? ? ????? t plh ??? ? ? ? ? ? ? ??? 5.0 10 15 ???? ? ?? ? ? ?? ? ???? 75 35 25 ??? ? ? ? ? ? ? ??? 150 70 50 ??? ? ? ? ? ? ? ??? ns ???????????????????? ? ?????????????????? ? ? ?????????????????? ? ???????????????????? turn?on delay time, all outputs t phl = (0.3 ns/pf) c l + 60 ns t phl = (0.15 ns/pf) c l + 27 ns t phl = (0.1 ns/pf) c l + 20 ns ????? ? ??? ? ? ??? ? ????? t phl ??? ? ? ? ? ? ? ??? 5.0 10 15 ???? ? ?? ? ? ?? ? ???? 75 35 25 ??? ? ? ? ? ? ? ??? 150 70 50 ??? ? ? ? ? ? ? ??? ns ???????????????????? ? ?????????????????? ? ???????????????????? 3?state propagation delay time output ?1? to high impedance ????? ? ??? ? ????? t phz ??? ? ? ? ??? 5.0 10 15 ???? ? ?? ? ???? 75 40 35 ??? ? ? ? ??? 150 80 70 ??? ? ? ? ??? ns ???????????????????? ? ?????????????????? ? ???????????????????? output ?0? to high impedance ????? ? ??? ? ????? t plz ??? ? ? ? ??? 5.0 10 15 ???? ? ?? ? ???? 80 40 35 ??? ? ? ? ??? 160 80 70 ??? ? ? ? ??? ns ???????????????????? ? ?????????????????? ? ???????????????????? high impedance to ?1? level ????? ? ??? ? ????? t pzh ??? ? ? ? ??? 5.0 10 15 ???? ? ?? ? ???? 65 25 20 ??? ? ? ? ??? 130 50 40 ??? ? ? ? ??? ns ???????????????????? ? ?????????????????? ? ???????????????????? high impedance to ?0? level ????? ? ??? ? ????? t pzl ??? ? ? ? ??? 5.0 10 15 ???? ? ?? ? ???? 100 35 25 ??? ? ? ? ??? 200 70 50 ??? ? ? ? ??? ns 6. the formulas given are for the typical characteristics only at 25  c. 7. data labelled ?typ? is not to be used for design purposes but is intended as an indication of the ic?s potential performance. figure 1. switching time test circuit and waveforms (t tlh , t thl , t phl , and t plh ) pulse generator disable input input v dd 16 v ss c l output 20 ns 20 ns v dd v ss v oh v ol t phl t thl t tlh t plh 90% 50% 10% output input t plh t phl 90% 50% 10%
mc14503b http://onsemi.com 5 figure 2. 3?state ac test circuit and waveforms (t plz , t phz , t pzh , t pzl ) pulse generator disable input 16 v ss 1 k output 20 ns 20 ns v dd 50% 90% v dd 1k 8 input t phz , t pzh circuit pulse generator disable input t plz , t pzl circuit output v ss 8 16 input c l c l v dd v ss v oh v ol v ol + 0.05 v v oh ? 0.15 v 10% 90% 10% 90% 10% t plz t phz t pzh t pzl output for t pzh , t pzl circuit output for t phz , t plz circuit disable input
mc14503b http://onsemi.com 6 package dimensions notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. ?a? b f c s h g d j l m 16 pl seating 18 9 16 k plane ?t? m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 10 0 10 s 0.020 0.040 0.51 1.01     pdip?16 case 648?08 issue t soic?16 case 751b?05 issue j notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 18 16 9 seating plane f j m r x 45  g 8 pl p ?b? ?a? m 0.25 (0.010) b s ?t? d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019 
mc14503b http://onsemi.com 7 package dimensions soeiaj?16 case 966?01 issue a h e a 1 dim min max min max inches ??? 2.05 ??? 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.10 0.20 0.007 0.011 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 ??? 0.78 ??? 0.031 a 1 h e q 1 l e  10  0  10  l e q 1  notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). m l detail p view p c a b e m 0.13 (0.005) 0.10 (0.004) 1 16 9 8 d z e a b c d e e l m z on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, r epresentation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5773?3850 mc14503b/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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